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SIT1568 preliminary 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? features ? 32.768 khz 5 ppm all - inclusive frequency stability ? in - system auto - calibration: - compensates for board - level stress - induced frequency errors - improves all - inclusive frequency stability ? world?s smallest tcxo footprint: 1.2 mm 2 - 1.5 x 0.8 mm csp - no external bypass cap required ? drives multiple loads and eliminates multiples xtals ? low integrated phase jitter (ipj) suitable for multiplying up for portable audio: 2.5ns rms ? ultra - low power: 4.5 a ? supply voltage: 1.8v 10% ? operating temperature ranges: - 20c to +70c, - 40c to +85c ? pb - free, rohs and reach compliant applications ? smart watches, health and wellness monitors ? ultra - accurate rtc reference clock ? smart utility meters, e - meters ? internet of things (iot) electrical characteristics conditions: min/max limits are over temperature, vdd = 1.8v 10%, unless otherwise stated. typicals are at 25c and vdd = 1.8v. parameter symbol min. typ. max. unit condition frequency and stability output frequency fout 32.768 khz total frequency stability after overmold [1] f_stab - 5 after overmold, post in - system calibration. after overmold, before in - system calibration. total frequency stability without overmold or calibration [1] - 5 5 ppm all inclusive, under influence of up to 5c/sec temp gradient and board - level underfill. allan deviation ad first year frequency aging f_aging jitter and frequency response performance integrated phase jitter ipj rms period jitter pj rms 2.5 4 ns rms 10,000 samples , p er jedec standard 65b peak - to - peak period jitter pj p - p 20 35 ns p - p dynamic temperature frequency response - 0.5 +0.5 ppm/sec under temp ramp up to 1.5c/sec supply voltage and current consumption operating supply voltage vdd 1.62 1.8 1.98 v supply current idd start - up time at power - up t_start 300 ms measured when supply reaches 90% of final vdd to the first output pulse. operating temperature range operating temperature range op_temp - 20 lvcmos output output rise/fall time tr, tf output clock duty cycle dc 45 output voltage high voh 90% output voltage low vol note: 1. contact factory for specific overmold conditions. relative to 32.768 khz , include s initial tolerance, over temp, vdd, load, hysteresis , board - level underfill, and , 3x reflow . tested with agilent 53132a frequency counter. measured with 1 00ms gate time for accurate frequency measurement. sitime corporation 990 almanor avenue, sunnyvale, ca 94085 (408) 328 - 4400 www.sitime.com rev 0. 8 revised march 10 , 2016
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 2 of 1 2 www.sitime.com pin configuration csp pin symbol i/o functionality 1 auto - cal or nc control input used for communicating calibration information to the chip for improving stability in the presence of board level induced stresses. leave pin floating (nc) when not using the calibration function. 2 clk out out oscillator clock output. 3 vdd power supply 1.8v 10% power supply. for most applications, the internal bypass filtering is acceptable. a psnr plot is shown in the typ ops section. if power - supply bypassing is required, a 10 - 100 nf low esr, ceramic capacitor is acceptable. 4 gnd power supply ground connect to ground. csp package (top view) gnd vdd clk out cal/nc 1 4 2 3 absolute maximum ratings attempted operation outside the absolute maximum ratings may cause permanent damage to the part. actual performance of the ic is only guaranteed within the operational specifications, not at absolute maximum ratings. parameters test conditions value unit continuous power supply voltage range (vdd) g mechanical vibration resistance mil 883, method 2007 70 g 1508 csp junction temperature system block diagram ultra-low power frac-n pll sustaining amp regulators driver vdd cal/nc clk out prog divider gnd mems resonator prog control temp control temp-to-digital nvm figure 1. SIT1568 block diagram
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 3 of 1 2 www.sitime.com description SIT1568 is an ultra - small and ultra- low power 32.768 khz tcxo optimized for battery - powered applications. sitime?s silicon mems technology enables the first 32 khz tcxo in the world?s smallest footprint and chip - scale packaging (csp). typical supply current is 4.5 a under no load condition. sitime's mems oscillator consists of a mems resonator and a programmable analog circuit. SIT1568 mems resonator is built with sitime?s unique mems first? process. a key manufacturing step is episeal? during which the mems resonator is annealed with temperatures over 1000c. episeal creates an extremely strong, clean, vacuum chamber that encapsulates the mems resonator and ensures the best performance and reliability. during episeal, a poly silicon cap is gro wn on top of the resonator cavity, which eliminates the need for additional cap wafers or other exotic packaging. as a result, sitime?s mems resonator die can be used like any other semiconductor die. one unique result of sitime?s mems first and episeal manufacturing processes is the capability to integrate sitime?s mems die with a soc, asic, micropro - cessor or analog die within a package to eliminate external timing components and provide a highly integrated, smaller, cheaper solution to the customer. t cxo frequency stability SIT1568 is factory calibrated (trimmed) over multiple temper - ature points to guarantee extremely tight stability over temper - ature. unlike quartz crystals that have a classic tuning fork parabola temperature curve with a 25c turnover point with a 0.04 ppm/c 2 temperature coefficient, the SIT1568 temper - ature coefficient is calibrated and corrected over temperature with an active temperature correction circuit. the result is a 32 khz tcxo with extremely tight frequency variation over the - 40c to +85c temperature range. when measuring the output frequency of SIT1568 with a frequency counter, it is important to make sure the counter's gate time is > 100 ms. shorter gate times may lead to inaccurate measurements. in - system auto calibration SIT1568 provides a unique, in - system calibration feature that compensates for assembly - related frequency offsets for improved overall frequency stability. the on - chip auto - calibration function is performed one - time during the customer's produc tion system manufacturing process. in order to initiate the one - time auto calibration process, refer to the pin 1 auto - calibration description. after assembly, follow the calibration steps as shown in the flow chart (figure 2). connect pin 1 to a 10 mhz reference (gps disciplined or equivalent) and monitor the SIT1568 clk out for status and error flags. a summary of these flags is shown in table 1. SIT1568 will compare its 32.768 khz (plus the assembly - related error) frequency to the accurate 10 mhz refe rence, calibrate (remove) the error and store the calibration in its internal non - volatile memory. the result is a calibrated 32.768 khz output frequency with an overall stability (accuracy) of 5 ppm. the entire auto - calibration process typically takes about 2 seconds. auto calibration is intended to be performed one time to remove the board - related offset errors. the auto- calibration procedure can be repeated if process fails during the initial steps (see table 1). the maximum number of retries is deter - mined by the customer. dynamic temperature frequency response dynamic tem perature frequency response is the rate of frequency change during t emperature ramps. this is an important performance metric when the oscillator is mounted near a high power compon ent (e.g. soc or power management) that may rapidly change the temperature of surrounding components. for moderate temperature ramp rates (< 2 c/sec), the dynamic response is primarily determined by the steady - state frequency vs. temperature of the device. the b est dynamic response is obtained from parts whi ch have been trimmed to be flat in frequency over temperature. for high temperature ramp rates (>5 c/sec), the latency in the temperature compensation loop contributes a larger frequency error , which is dependent on the temperature compensat ion update rate. t his part achieves excellent performance at 3hz update rate. this device family supports faster update rates for further reducing dynamic frequency error at the expense of slightly increased current consumption.
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 4 of 1 2 www.sitime.com figure 2. initial offset auto - calibration procedure 2 . connect pin 1 to f_refin* waiting t_pu_to_refin after vdd powerup output = 65.536 khz (auto-calibration in progress flag) post assembly and over mold, wait time = t_settle * gps-disciplined 10 mhz ocxo reference ** max retry count set by customer ? step 1 power up step 2 set-up & calibrate initial conditions 1. power up pin 3 vdd with t_vdd_ramp_up to vdd_cal from 0v pin 1 should be floating output = 32.768 khz 25ppm no error flag: see error table clk output = 5.12 khz or 2.56 khz yes status flag: ready for memory program clk output = 20.48 khz 3. switch pin 1 to v_prog with t_prog_ramp_up output = 20.48 khz (ready to start memory burn flag) auto-calibration failed. log error flag and discard module step 3 program calibration results into memory yes return to step 1 check clk out for successful calibration. wait time in this state is t_cal yes no retry? ** yes no no auto-cal retry reaches max limit check clk out for valid v_prog on pin 1 yes no yes status flag: 3.5v detected on pin 1 clk output = 10.24 khz check clk out for successful memory program. wait time is t_prog_mem pass fail pass status flag: auto-cal successful clk output = 32.768 khz 3 ppm fail error flag: see error table clk output = 1.28 khz or 0.64 khz auto-calibration successful. switch pin 1 to from v_prog to float with ramp < t_prog_ramp_dn. log output frequency. optionally power cycle vdd to 1.8v, then log output frequency
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 5 of 1 2 www.sitime.com in - system auto - calibration pin 1 auto - calibration mode dc electrical characteristics parameter symbol min. typ. max. unit condition input impedance z_in 80 k? internal pull - down input vih vih 70% input vil vil input overshoot voltage v_in_od program voltage v_prog 3.4 3.5 3.63 v pin 1 nvm program voltage program current i_prog auto - cal voltage noise ripple auto - cal vdd supply vdd_cal 1.71 1.8 1.98 v vdd (pin 3) supply voltage during auto - calibration vdd bypass capacitor pin 3 idd prog current idd_prog pin 3 min power down threshold voltage vdd_pd 0.7 v pin 1 vdd threshold to guarantee internal device power - down auto - calibration mode timing characteristics parameter symbol min. typ. max. unit condition post system assy settling time t_settle 24 hr wait time between > absolute max storage temp exposure (150c) and auto - cal start pin 3 power supply ramp rate t_vdd_ramp auto - cal ref - in wait time t_pu_to_refin 0.5 ref in detection time t_refin_to_clk_ flag_65k 1.2 ms time to detect 10 mhz auto - cal reference inputs, 65.536 k hz output auto - cal time t_cal pin 1 float duration t_refin_to_float 200 pin 1 prog voltage ramp rate t_prog_ramp_up 1 prog voltage detection time t_prog_to_clk_ flag_10k 100 ms time to detect program voltage, 10.24 khz output flag pin 1 prog voltage ramp down t_prog_ramp_dn 1 memory programming time t_prog_mem pin 3 power - down delay t_prog_to_pd 1 auto - calibration reference clock characteristics parameter symbol min. typ. max. unit condition auto - cal ref clock freq f_refin 9.999999 10 10.000001 mhz (10 mhz 100ppb) correct reference frequency for auto - calibration auto - cal ref clock rise/fall time t_refin_r/f 4 auto - cal ref clock duty cycle dc_refin 40 auto - cal ref clock period jitter pj_refin auto - cal ref clock allan deviation ad_refin 10 ppb for averaging time = 1 second
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 6 of 1 2 www.sitime.com t _prog_ mem 0v t_pu_to_refin vdd pin 3 vdd_cal vih vil v_prog t_cal t_prog_ramp_up t_prog_ramp _dn cal pin 1 t_prog_to _pd t_vdd_ramp float pin 1 = auto- cal ref-in float pin 1 = v_prog float t_refin_to _float t_refin_to _clk_flag_65k clk pin 2 t_prog_to_clk_flag _10k 32.768 khz 65.536 khz 20.48 khz 10.24 khz 32.768 khz figure 3. auto - calibration timing diagram table 1. auto - calibration status and error flags flag name output frequency [2] recommended minimum gate time status or error flag retry calibration auto - calibration in progress 65.536 khz 10 ms status n/a ready to start memory burn 20.48 khz 10 ms status n/a 3.3v on pin 1 detected 10.24 khz 10 ms status n/a auto - calibration successful 32.768 khz 3ppm 100 ms status no 10 mhz reference lost during calibration step 3 5.12 khz 10 ms error yes frequency correction out of range in step 3 2.56 khz 10 ms error yes memory burn failed in step 3 1.28 khz 10 ms error no 3.3v lost on pin 1 during memory burn step 3 0.64 khz 10 ms error no note: 2. frequency tolerance is 5% except for 32 khz frequency output.
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 7 of 1 2 www.sitime.com g s d SIT1568 4 1 2 3 32.768 khz clock on customer module no-connect on customer module customer product board 1.8v vdd cal/nc customer test board buffer gps - disciplined ocxo reference frequency counter 10 mhz calibration input c l < 50pf level shifter microsemi xl- gps v2 agilent 53230a sn74aup1g17 opa355ua roof top antenna place buffer close to connector clk-out gnd vdd to measurement channel 10mhz ocxo 500mv sine-wave to ref-in (back panel) to controller via lan/gpib power mosfet irlml6402 spdt relay 0.1f 10pf fsa4157 5v 1.8v 5v 1n4148 switch control 3.5v 1f switch control 249k figure 4. in - system auto - calibration hardware interface
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 8 of 1 2 www.sitime.com typical operating curves (t a = 25c, vdd = 1.8v, unless otherwise stated) frequency stability over temperature (post reflow) no load start - up and steady - state current profile 4 . 5 internal caps charging logic start - up nvm read osc start-up steady state temperature compensation (13 a) 350ms lvcmos output swing power supply noise rejection ( psnr ) no vdd bypass 10 nf vdd bypass
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 9 of 1 2 www.sitime.com dynamic frequency response for m oderate temperature ramps frequency accuracy under a moderate temperature ramp up to 2c/sec is limited by the tcxo?s trimmed accuracy of the frequency stability over - temperature. note: 3. measured relative to 32.768 khz.
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 10 of 1 2 www.sitime.com dynamic frequency response for fast temperature ramps 5c/sec temp ramp frequency response ~5c/ sec 3 hz temp comp refresh rate [4] ~10 c/sec 3 hz temp comp refresh rate [4] for temperature ramps > 5 c/sec, the freque ncy accuracy is limited by the update rate of the temperature compensation path (see the 5c/sec and 10c/sec plots). contact factory for applications that require improved dynamic performance. note: 4. referenced to 32.768 khz.
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 11 of 1 2 www.sitime.com dimensions and patterns package size C dimensions (unit: mm) recommended land pattern (unit: mm) 1.55 x 0.85 mm csp # 1 # 2 # 4 # 3 # 2 # 1 # 3 #4 14 4 4 4 31 1 # 1 # 2 # 4 # 3 4 1 1) no ultrasonic or megasonic cleaning: do not subject the SIT1568 to an ultrasonic or megasonic cleaning environment. permanent damage or long term reliability issues may occur. 2) applying board - level underfill and overmold is acceptable and will not impact the reliability of the device. any post assembly frequency shift can be calibrated with the in - system auto - calibration feature. 3) reflow profile, per jesd22 - a113d. 4) for additional manufacturing guidelines and marking/tape - reel instructions, click on the following link: http://www.sitime.com/component/d ocman/doc_download/243 - manufacturing - notes - for - sitime - oscillators
SIT1568 1.2mm 2 micropower , 5 ppm, 32.768 khz tcxo with in - system auto - calibration the smart timing choice ? rev. 0. 8 page 12 of 1 2 www.sitime.com ordering information sit 1568 a i - je - dcc- 32. 768s part family ?SIT1568? revision letter ?a?: is the revision temperature range ?c?: extended commercial, -20 to 70oc ?i?: lndustrial, -40 to 85oc packaging samples in cut tape package size ?s?: 8 mm tape & reel, 10ku reel ?j?: 1.5 mm x 0.8 mm csp ?d?: 8 mm tape & reel, 3ku reel ?e?: 8 mm tape & reel, 1 ku reel all-inclusive over temp stability ?e?: 5 ppm lvcmos output output clock frequency (khz) 32.768 khz revision history version release date change summary 0.5 6/30/15 advanced da tasheet initial release 0.8 3/10/16 p reliminary datasheet initial release ? sitime corporation 2016. the information contained herein is subject to change at any time without notice. sitime assumes n o responsibility or liability for any loss, damage or defect of a product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a sitime product, (ii) misuse or abuse including stat ic discharge, neglect or accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by sitime under its normal test conditions, or (iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress. disclaimer: sitime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all expre ss or implied warranties, either in fact or by operation of law, statutory or otherwise, including the implied warranties of mercha ntability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or usage of trade, as well as any common - law duties relating to accuracy or lack of negligence, with respect to this material, any sitime product and any product documentation. products sold by sitime are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved or at stake. all sales are made conditioned upon compliance with the critical uses policy set forth below. critical use exclusion policy buyer agrees not to use sitime's products for any application or in any components used in life support devices or to operate nuclear facilities or for use in other mission - critical applications or components where human life or property may be at stake. sitime owns all rights, title and interest to the intellectual property related to sitime's products, including any software, firmware, copyright, patent, or trademark. the sale of sitime products does not convey or imply any license under patent or other rights. sitime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale of products or services by sitime. unless otherwise agreed to in writing by sitime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly prohibited.

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